NeoMTP is a single-poly embedded memory device offering the industry’s lowest implementation cost at 1K program/erase cycles with medium to high densities(16K~512K bits).
NeoMTP is a single-poly embedded memory technology offering high NVM memory density with 1K endurance at the lowest implementation cost to be found in the industry. NeoMTP performs erase operations for up to 512K bits memory density and serves as a true rewritable memory technology up to 1K P/E cycling with zero additional masking layers. NeoMTP technology is equipped with an additional erase gate and is very similar to NeoBit for easy implementation.
Suitable for CMOS technologies in major foundries ranging from 0.18um~55nm
Fast Time to Market
No process tuning
High Temperature Operation
Up to 150°C/10 Years retention
Wide Operation Temperature
No extra process required
Like NeoBit, NeoMTP uses channel hot-hole to induce hot-electron injection into the floating gate (CHEI) for programming, thus turning on the channel of the p-type FG-MOSFET. NeoMTP uses Fowler-Nordheim (F-N) Tunneling to erase the bit cell. With the application of an erase gate voltage, electrons in the floating gate are pulled out the erase gate. When no electrons remain in the floating gate, the channel of the p-type FG-MOSFET is turned off. This operation achieves very low power consumption for such a large memory density.
Use Cases & Functionality
NeoMTP has a broad range of applications, including USB type-C, wireless charger, touch panels, P-Gamma, MCUs etc. The core functionality of NeoMTP technology makes it ideal for setting system parameters for different chips in a single system, making NeoMTP an ideal replacement for traditional external SPI flash and EEPROM. In its current design, NeoMTP can go through up to 1000 P/E cycles, but it can also be specially designed to achieve 100 P/E cycle times to speed up product delivery time.
NeoMTP has completed automotive grade qualification to address the autotronic application market.