Investor Questions

Embedded Non-Volatile Memory (eNVM) refers to a type of non-volatile memory technology that is integrated and embedded directly into a chip for the purpose of storing data. Information stored in eNVM is retained even when power is turned off. Generally, it has higher performance and speed compared to non-embedded (external) memory, therefore, all chips has and require eNVM functions.

There are several types of eNVM, namely ROM, eFuse, OTP, MTP, embedded flash, and emerging memory (RRAM and MRAM). Among these, eMemory invents IPs and solutions for OTP, MTP, and emerging memory. eFuse and ROM (Read-Only Memory) are provided by foundries.

ROM must be programmed during the design phase and remains unchangeable after manufacturing. In contrast, eFuse programming occurs during the wafer test phase and cannot be altered post-packaging. eFuse presents additional drawbacks, including smaller data density and a larger area on the chip. Moreover, it lacks security, making it susceptible to reverse engineering through techniques like electron microscopes. OTP occupies a smaller area, is programmable even after packaging, and is more secure due to invisible storage at the transistor level.

Embedded flash also comes with its share of disadvantages. It is limited to mature process nodes and requires at least 10 additional mask layers, contributing to increased foundry costs. MTP does not need additional mask layers and can be used at advanced process nodes.

eMemory invents pure technology-based Intellectual Property (IP) at the transistor level. We invent IPs for non-volatile embedded memory, which means that the memory function is embedded on the chip and has at least 10-year data retention. Our OTP, a one time programmable device, guarantees the chip memorizes one-time and forever. For example, parameter setting, trimming, repair, code storage, UID, and more. Deriving from two OTP transistors, we also have hardware security-related IP solutions, namely PUF, which stands for physical unclonable function to serve as a hardware root of trust for chip security needs. In addition, we also invented embedded MTP (multiple times programmable) IPs, embedding multiple times programmable memory functions such as flash and EEPROM.

For more technical explanations of each product, please refer to our product pages here.

Our business model consists of 20-30% licensing revenue and 70-80% royalty revenue. The licensing revenue comprises technology licensing from foundries and design licensing from end customers. Design licensing is further divided into usage and NRE fees; the former for reusing our IPs from our IP library, the latter for customized designs. We place less emphasis on licensing to encourage customer adoption of our IPs but insist on collecting royalty because it is reoccurring and a fixed percentage of foundry wafer price. A royalty-based business will drive revenue as more customers adopt our IPs at more advanced nodes, resulting in higher ASP.

To grow our business, our main goal is to increase our penetration rate in foundries. By expanding into more advanced processes, we can charge higher royalties per wafer, increasing ASP.

Simultaneously, we can also achieve this goal by developing new technologies and applications. For example, in terms of new application development, we are working on repair functions for DRAM and additional security functions for flash. In terms of technological innovation, our NeoPUF technology offers chip fingerprints and perfect natural randomness. It's cost-effective, energy-efficient, high-speed, and compatible with global foundry processes. Our PUF technology serves as one of key business growth drivers, opening doors to new applications and partnership opportunities, especially in hardware-based security.

We currently work with 25 foundries worldwide. The majority of our royalty revenue comes from leading foundry customers T and U, contributing around 50% and 20% respectively. The remaining 30% are made up of revenue contributions from other foundry-based customers. 

The majority of our revenue contribution comes from Taiwanese foundries. Leading foundry T is our top foundry customer and almost 50% of our royalty revenues come from them. Since we have a lot of tape-out in leading foundry T's pipeline waiting for production, it might increase to 60% for leading edge.

Our royalties are mainly collected from foundries. Compared to over 2000 fabless customers, collecting from our twenty-something foundry customers is much easier. Furthermore, foundries generally operate at a certain business scale and maintain a healthy financial status. They also possess a more comprehensive royalty report and production record system, making the reports from foundries more complete and reliable than reports from fabless customers. At the same time, we conduct regular reviews of foundries’ royalty reports and perform irregular on-site audits, cross-referencing them with fabless customers. Through these extensive procedures, we ensure that customers have paid their royalties.

Our royalty rate is fixed and we receive a royalty report from foundry every quarter, based on process node. We calculate the penetration rate by dividing the royalty amount by the royalty rate (indicating the percentage of foundry revenue paid towards our royalties) then compare it according to the process’s revenue of the foundry’s previous quarter.

Around 10-15% of our customers are from China, including 9 foundries and over 900 chip companies.

Embedded provides better performance overall compared to external because it is more high-speed, low-power and secure. As processors are moving forward, all the accompanying technologies have to improve performance to catch up.

We have always had AI clients who utilize our IP for security, SRAM repair and other related AI applications.

Given that AI systems need to process a vast amount of sensitive data and code, enhancing security is crucial. Our PUF-based solutions meet the stringent security requirements of our clients in protecting AI-related information and technology.

Furthermore, with the growing demand for AI, such as larger training data and the need for high-speed computing, there's an increased use of multi-core, high-performance CPUs. This necessitates more high-density embedded SRAM to cater to faster computations and larger training models. The rise in SRAM memory density raises the likelihood of memory defects, thereby increasing the demand for SRAM repair. Currently, advanced process clients are adopting our IP for SRAM repair.

It takes a while for our technologies to take off because all of our technologies are original inventions and need to undergo an extensive process of patenting, passing foundry qualifications, and accumulating production records.

The first stage of commercializing a technology requires spending at least 1-2 years in the foundry qualification stage. Due to the risks associateds with embedded memory, we must prove that our technologies work. Once proven, we need to find early adopters, which take another few years before moving from tape-out to production. Once each technology has accumulated enough production record, larger companies will adopt our IPs, this process typically takes another few years.

Over 70% of our expenses are allocated to R&D. These expenses are mainly comprised of employee salaries, software, other equipment, as well as application and maintenance costs related to patents.

Our R&D expenses are mostly sustained by our partners, a key factor contributing to our high operating margin. The high costs associated with testing and qualification, including foundry shuttle, mask, test chip and more, are fully covered by our foundry partners. They not only cover these costs, but also pay us license fee. A similar arrangement exists with technology partners.

Our technologies are original inventions and all need to be patented, which do expire after 20 years. To ensure continuous protection, we continually enhance and modify our technologies, creating different versions to renew patents. Notably, each technology is safeguarded by a comprehensive patent pool, encompassing cell patents, design patents, and more. That is why we have over 1500 patents as of now.

Take our NeoBit for example, its patent was refiled a few years ago because the initial version was relatively rough. We continuously refine it based on customer feedback, and the patent is now in the fourth version. By reapplying for the improved technology, the patent protection period has been extended for another 20 years. Hence, NeoBit remains protected by current patents and still contributing to tape outs and generating royalties.

A single patent alone is not sufficient for competitors to replicate our technology. Additionally, surrounding circuit designs for read and write operations are part of a comprehensive patent pool, with each IP being protected by multiple patents. Our agreements with foundries are perpetual and don't have an end date, creating a robust protection framework that makes it difficult for competitors to manufacture and use our IP at foundries. The only potential exception would be an IDM using our technology within their own facilities without authorization; however, if discovered, they would face significant penalties. As long as a chip is produced within the agreement's timeframe and utilizes our IPs, it must adhere to the agreement terms and pay the predetermined royalty rate.

Our main potential risk is encountering clients who fail to pay royalties. In order to mitigate this situation, we not only carefully assess the financial status of clients at the beginning but also explicitly stipulate the penalties for non-payment of royalties in our contracts, ensuring the operation and interests of our company are protected.

So far, over 99% of our royalty revenue comes from licensed foundries and IDM customers. These foundries/IDMs generally have considerable business scale and good financial conditions. When we receive royalty reports and payments from them each quarter, we can also assess their financial status on a quarterly basis. Since our company’s establishment, there has not been any occurrence of unpaid royalties. Furthermore, we conduct an annual review of the credit conditions of these foundry/IDM customers and make appropriate adjustments to ensure that our operations and interests are not compromised.

Our payout ratio is almost 100%. For more information on Yearly EPS vs. Dividends, please visit here.

For our AntiFuse OTP, our main competitor is Synopsys, which acquired our previous competitors Kilopass and Sidense. However, we hold the major market share due to the early availability on advance nodes, and having more process nodes in worldwide foundries. Currently, the primary OTP solution offered by foundries is eFuse, which is included in their standard library. However, it falls short in terms of area cost-effectiveness, yield, reliability and flexibility compared to AntiFuse OTP.

Regarding MTP, our main competitors are small vendors, as the market has not really taken off. Nevertheless, we are beginning to see some applications gradually shifting towards adoption. We believe that our MTP-related technologies will dominate the market, just as our OTP has.

For PUF, our main competitor is SRAM PUF, which is inferior in terms of reliability, randomness, uniqueness and robustness. In the PUF-based solution segment, our competitors are Rambus, Secure IC and Synopsys. We are the only vendor with a comprehensive solution, from hardware-based to software-based IPs, including our proprietary OTP and PUF technologies, as well as cryptographic algorithms and anti-tampering designs. In addition, since PUF is derived from our OTP technology, it is manufacturable on all OTP-qualified foundry process nodes worldwide.

Our customers do have many products that simultaneously utilize different technologies from our company, such as OTP+PUF, OTP+MTP or MTP+MTP, to meet their specific product functionality design requirements. When a product uses multiple of our technologies, we will charge relevant royalties for each different technology, respectively.

The two technologies will not cannibalize each other since they serve two different purposes.

OTP is designed to permanently memorize information once and is used to store data that shouldn’t be changed, such as device ID, security codes, permanent settings, and more. Once programmed, the information is expected to remain constant throughout the device’s lifespan. (More OTP information here.)

MTP is designed to be programmed and erased multiple times, from a thousand to hundreds of thousands. MTP is used in applications that require frequent updates and modifications, such as complex PMIC, MCU or E-paper applications. (More MTP information here.)

Many chips require OTP for functions such as trimming and parameter setting. However, not all require MTP. We also have alternatives such as external flash memory and EEPROM. In addition, to enhance the functionality of integrated circuits (ICs), many customers do require embedded MTP. This enables repeated rewriting for additional information storage and code updates within the chip and meets low power consumption requirements.

The reason MTP faced slower adoption is because in terms of memory cell architecture and peripheral circuits, MTP is more complex. The complexity at a fundamental physical level results in a longer lead time between technology development and customer production. To develop the best solutions, the MTP technology specifications need to align with customer ICs, and the MTP technology itself should offer cost-effectiveness and competitive advantages over external alternatives. However, each alteration in IP specification requires re-qualification and development with foundry process technologies, typically taking a few years before achieving significant customer volume shipments.

Moreover, scenarios where multiple rewrites and embedding are imperative, alternative solutions with higher specifications and maturity, such as eFlash, are available. To choose MTP, there must be a compelling reason, such as cost considerations or challenges in integrating eFlash into specialty processes like HV/BCD.

However, MTP is gradually gaining momentum due to the shift in customer and market application demands towards embedded MTP solutions. This shift aims to enhance in-house chips in terms of both functionality and cost-effectiveness. Various mainstream requiring MTP are progressively increasing. Notable examples include DDR5 SPD, which require 100K re-write times, making embedded EEPROM necessary. The enhanced complexity of the new SPD features makes external EEPROM unsuitable, and eFlash is less fitting from a cost perspective, thereby providing a favorable entry point for MTP. Other applications, such as e-paper drivers, are leaning towards MTP due to the need for regular adjustments in more complex panels.

eMemory's NeoPUF solutions leverages the unique physically unclonable variations that occur in the silicon manufacturing process to solve multiple security issues such as:

1. Device Authentication: NeoPUF generates a unique identifier for each device based on its inherent physical unclonable variations. This unique identifier can be used for device authentication, ensuring that only legitimate devices are authorized to access a system or network.
2. Key Generation: NeoPUF can be used to generate private keys that are unique to each device, to enhance the security of cryptographic protocols, such as encryption and digital signatures.
3. Anti-Counterfeiting: The uniqueness of the NeoPUF can be used to detect counterfeit or cloned devices. By verifying the password stored in NeoPUF during the authentication process, it becomes challenging for attackers to replicate the device's identity.
4. Anti-Tampering: NeoPUF generates a private key and public key pair, enabling the signature function to prevent files from being tampered with.
5. Random Number Generation: The inherent unpredictability of NeoPUF can be used to generate random numbers, which are crucial for various security applications, including cryptographic protocols and secure communications.

If the chip does not use PUF, random numbers must be generated by a random number generator (TRNG). However, TRNG relies on the competition between two identical circuits to generate random numbers, resulting in several problems. First, the randomness will be insufficient, and the generated random numbers may not be unique. Second, the method for generating random numbers is easily influenced by surrounding variables such as temperature, voltage, and noise, leading to inconsistent results.

In terms of licensing and royalties this year, we have seen year-over-year growth in NeoBit OTP and MTP, indicating that the demand for our products in mature process nodes remains strong. Although the utilization rates of some foundries in mature processes are not as high as before, the aggressive global expansion of capacity in mature processes means that overall demand in this area will continue to grow for us.

Regarding licensing fees, the progress in advanced processes will accelerate due to a broader range of product lines, more technology nodes, and more foundry process platforms available to customers, along with the ARM and Siemens collaboration platforms. As a result, both licensing fees and royalties will be much higher than before. We are very confident about future growth.

Our competitive edge stems from collaborating with foundries to build our technology platforms and licensing our technology to fabless companies for use at these foundries. To stay ahead of our competitors, we must:
1) Continuously establish our technologies on the foundries' new process platforms,
2) Continuously develop the IPs that fabless companies need for each technology,
3) Continuously integrate new IPs to offer fabless customers better functionalities, such as security IPs, from Root of Trust to Security Processors.
Only through continuous innovation, widespread platform deployment, and accelerating progress can we maintain our leading position and prevent competitors from catching up.

Our business model is unique in that we license our technologies to foundries, making their process platforms also our technology platforms. Globally, 25 foundries have licensed our technology, and we have established a total of 600 process platforms (ranging from 0.35μm to 3nm), including OTP, PUF, MTP, EE, Flash, and RRAM. Each year, we add 50 new process platforms worldwide, achieving over 600 tape outs annually. We collect royalties as these chips enter mass production.

Because of our unique business model, over 80% of our revenue comes from royalties from accumulated products entering production and licensing from our existing library, which requires minimal R&D resources. This allows us to focus our research and development on creating new technologies and platforms. As we continue to:
1) License more technologies to foundries,
2) License more IPs to fabless companies,
3) Innovate more application IPs,
these efforts will drive sustained business and profit growth.

In terms of talent, we can maintain our current headcount to support the expansion of existing foundry technologies. However, we still need new talent to develop IPs in areas like security systems, which require specific expertise. We hire a small group of innovative experts to develop these core technologies, rather than engage in design services. Even when we increase our headcount, we do so gradually, rather than through rapid expansion over a short period.

The reason for the fast growing demand of our PUF-based security IPs is because: high security architecture can be simply implemented.

Security is now a required element to be connected to cloud services. As security becomes necessary for applications in edge and cloud devices, high- security solutions that can be easily implemented are preferred. Our PUF- based solutions provide integrated secure storage and secure Root of Trust, becoming a popular choice for security applications. In the past, creating a security system requires complicated cryptographic processing. With our perfect randomness PUF IPs, security functions can be implemented much easier and faster into chip functions without complicated crypto-processing, which typically increases chip size, sacrificing speed and power consumption.

In the past, when people seek security solutions, they have to look around and search for a couple of providers to provide 1) security storage, 2) Root of Trust, and 3) crypto engines. After they have IPs with all three components, they still need to figure out how to integrate all into a solution. To become to a security co-processor, SoC designers need to add firmware and API such that it can be easily embedded into SoC.

Our PUFcc integrates all three elements into one security solution and is able to provide firmware and API to facilitate the design of SoC. Since our solutions is built on our existing OTP process platforms, we are able to provide our solutions quickly as we currently have more than 600 OTP process platforms ready. No other security IP companies are able to do this.

The benefits for customers are: if customers adopt our solution for their product designs, we can help customers pass security certifications, without extra R&D and certification costs.

Rambus only have algorithm-related solutions. If customers adopt Rambus’ solution, they will still lack a secure OTP or PUFrt to serve as the chip’s root-of-trust.

We still charge license fees and royalties. The joint activity is mainly for promotion, we do not need to pay the other party any fees or profit shares.

Our technology is a genetic invention and there are no government restrictions. The technology patent is for 20 years, but we improve the version periodically to extend the patent period. For example, NeoBit's patent was extended to 2034 in 2014. In addition, the complete IP, including circuit design, has 50 years of copyright protection, and the royalty payment contracts we license to foundries have no termination date.

Reliability is not the only consideration.

UID and Key ensure the chip's identity cannot be tampered with, copied or stolen, and the process of generating it needs to be strictly controlled. To use eFuse to for Key storage or UID, you must first write-in the key or obtain a random number from outside. The eFuse of each chip is empty at the beginning, and the data is written externally, which gives attackers opportunity to manipulate information. Using NeoPUF to generate Key or UID is from the chip's own PUF and cannot be written externally. The security of these two methods are different.

In addition to generating the UID and Key, which cannot be interfered with externally, our PUFrt and Secure OTP both contain physical, electrical anti-tampering designs (certified by Riscure), which can further prevent attacks.

We are not affected by the U.S. requirements and do not need to provide KYC information. Our customers are mainly from Europe, US and Japan.

Encryption uses crypto algorithms to protect sensitive information, including secure websites or even emails. The widely used public-key encryption system relies on algorithms difficult for even the fastest conventional computers to solve in limited time. However, quantum computers will threaten existing public-key encryption within a decade, The National Institute of Standards and Technology (NIST) is expected to announce new algorithms for encryption in 2024. The main problem with the potential post-quantum encryption algorithm is that the key size is very long, which may be thousands of times longer than current RSA and ECC keys.

The strength of eMemory's PUF-based Root of Trust lies in its flexible and high-speed key generation, which is currently the world's easiest, fastest, and safest method. It will be necessary for customers to adopt PUF-based Hardware Root of Trust to face post-quantum crypto algorithm. The last large-scale replacement of the encryption algorithm was around 2000. At that time, the United States decided to adopt the AES algorithm. It took ten years for major related companies to switch to the new encryption methods, so we expect that changing to a new encryption algorithm will also take around ten years. This is very positive for speeding up customers' adoption of our solution.

To learn more about Post-Quantum Cryptography (PQC), please visit this article.

Advanced AI models are typically stored in conventional commodity flash memory, and this standard storage device has no security function, so it can be stolen or modified. Our PUF-based hardware security Root of Trust IP (PUFrt) and Crypto Coprocessor (PUFcc) can encrypt and authenticate these AI models to protect them from being stolen or modified, which is why customers need PUFsecurity and eMemory solutions.

In addition, all processors have SRAM, one type of volatile memory, just like DRAM. When SRAM is manufactured, it will have bad bits that need OTP for memory repair. In the past, eFuse was used to do SRAM repair functions. However, the SRAM density in AI chips is much bigger, which eFuse cannot fulfil due to density limitations. Our OTP offers 500 to 1000 times bigger density than eFuse. Therefore, for AI with large-density/SRAM, our IP become a necessity. Based on SRAM repair and security requirements, most AI chips will convert from eFuse to our OTP.

Our cooperation with Arm has been ongoing. Some customers have already taped out our security solution through ARM's platform and contributed license fee already.

Caliptra is an open-source standard that aims to integrate security mechanisms into chips and plays a crucial role in the Open Compute Project (OCP) reference design. Its primary goal is to establish an open-source standard for the Hardware Root of Trust (HRoT), which is essential for hardware-based security functions embedded in CPUs, GPUs, SoCs, ASICs, Network Chips, SSDs, and more.

As far as we know, this is the first time TRNG, OTP and PUF are collectively addressed within a single standard, which happens to be our strengths and expertise. This also means the HRoT of the processor for data centers must include hard macros, TRNG, OTP, and PUF, as key components. However, since hard macros are unavailable through open source, they must be obtained through licensing from us.

While Caliptra is still in its early stages, we foresee broader adoption for hardware-based security in data centers in the future, which opens up significant opportunities for our PUF-based technologies.

We are working with them on Confidential Computing Architecture and Corstone Architecture, covering applications such as Smartphones, Automotive and IoT (edge computing). There are license contributions from Automotive and IoT customers already.

Arm's CPU application in PC belongs to their Client Business. Similarly, CPU in mobile also belongs to Client Business. Our PUFrt will be used in the Runtime Security Engines (RSE) of Arm's mobile CPU. Once verified, it may also be used in the CPU for PC.

Other than CPU partners, we have also licensed to DPU, AI, Edge Computing, HPC, IoT and ADAS customers.

Arm is the leading CPU IP company with more than 95% of the market share in mobile. The successful co-development of PUF-based Root of Trust security into their CPU has the following implications :

1. Our PUF-based security Root of Trust solution is the best in the market.
2. We can enter the mobile market with Arm, which currently holds over 95% of the market share.
3. We expect our market share in the Confidential Computing market will also be very big.

After the launch of NeoPUF which is our PUF technology, many customers have switched to use our NeoPUF and OTP instead of SRAM PUF, from Intrinsic ID’s technology is based on. The main reason is that our NeoPUF has better properties than SRAM PUF, including:
1) Enhanced stability.
2) Increased reliability.
3) Eliminates the need for error correction.
4) Eliminates the need for OTP for storing helper data.
5) Demonstrates radiation-hardened capabilities

We are confident that we will become a leading company in the field of PUF, OTP, TRNG, and RoT IPs. Furthermore, Synopsys’ acquisition of Intrinsic ID is a good sign that the industry recognizes the significant potential and future demand for PUF in chip security and driving the provisioning of these IP solutions through acquisition to better penetrate the market and capitalize on these opportunities. eMemory recognized this trend in 2015 and developed the best PUF-based technology to address the problems encountered by SRAM PUF. Combined with our own OTP, we can provide customers with complete hardware security solutions. We believe that we are at the forefront of this trend and will be the first to provide one-stop-shop services to meet customer demands.

In very high security systems, the high-speed TRNG is very important as well as PUF because in our invention, the high-speed TRNG relies on the PUF as input to generate random numbers. PUF also plays an important role as unique ID, which requires unique numbers from natural randomness. By using this natural randomness, the unique ID can also create the mother security key for the system. Therefore, in very high security systems, both PUF and high-speed TRNG are very important.

The OpenTitan platform sets the standard for securing data transmission between IoT devices and the cloud through hardware security. Our security IP, being a hardware security solution, can be directly applied to Google's OpenTitan platform for encryption and decryption.

Within the Zero Trust framework, eMemory's hardware security provides a hardware root of trust and security computation capabilities. For cybersecurity software companies, hardware security can enhance the security of their applications. eMemory's security IP aims to boost the competitiveness of these software companies, not to compete with them.

Licensing for our PUF technology has been increasing. The first customer to adopt our PUF was China’s largest chip company. However, due to US government sanctions, we were unable to continue receiving royalties from their production. Despite this, we have more than 60 tape-outs gradually entering the mass production stage and will soon contribute to our royalties.

Our TRNG is based on our OTP and PUF technologies. This is a hard IP and must be qualified in each process. The number of our qualified processes continues to grow, progressing towards the most advanced nodes. As more customers adopt our technology and accumulate production records, and as hackers use faster computing to launch attacks, the market will demand faster random number generators. We are working with our CPU partners to promote this technology and are very confident about its future developments.

Our collaboration with Arm mainly focuses on hardware security. In terms of PUF-based security, we have outlined a roadmap to continuously enhance security levels and introduce new functions, which are also needed in all of Arm's applications. In our partnership with Arm, we jointly promote IP to customers, license it to Arm or their customers on advanced process node platforms, conduct educational outreach together, and co-develop and integrate new IPs to meet higher security requirements. All these efforts are ongoing, and our licensing and royalties will increase as customers adopt our IPs in more products and enter mass production.

The Caliptra standard primarily establishes security requirements for data centers, largely driven by cloud service providers (CSPs). CSPs offer data centers for data storage, analysis, and services such as AI model training and more. Customers using data center services want their data to be securely protected, analyzed, and deliver expected outcomes. For end devices to access cloud-based data centers, they must comply with Caliptra standards, which require a PUF for generating a unique ID, a TRNG for random number generation, and OTP for private key storage. Our PUFrt IP integrates all three (PUF, OTP, and TRNG) to create a root of trust, meeting the security needs of data center applications, with customer demand for PUFrt steadily increasing.

Caliptra’s initial focus was indeed on datacenter applications. However, as AI processing shifts toward the edge, such as in IoT sensors, autonomous vehicles, and smart devices, the root of trust (RoT) becomes equally crucial. For edge AI, RoT enables secure authentication when devices communicate with datacenters, ensuring that only verified data and devices can interact with the central systems.

Establishing RoT at both datacenter and edge levels enhances security and integrity across the entire ecosystem, from data generation at the edge to cloud processing and storage. This approach strengthens overall network protection, making data transmission and processing more reliable and secure.

We offer hardware security solutions based on PUF technology to protect data usages, while many security software and services companies use software for data encryption and secret key generation. The use of software method to secure data usages is easy to be attacked through internet. For a system to be secure, secret keys must be generated randomly and stored in hardware. Our cutting-edge technology combines both the generation and storage of secret keys, providing the most secure foundation for security applications and ensuring data protection.

This trend is consistent among these IP companies, as most of them have not continued developing hardware security IP, while they pay more attention to digital cryptography development. Nevertheless, we are committed to enhancing root of trust technology, ranging from 55/40nm down to 5/4/3nm. Consequently, leading IP companies and ASIC design service providers are working with us across different process nodes to promote PUF-based solutions to their clients.

NeoPUF is capable of generating long random numbers, reaching several megabits in length, which can serve as a secret key. Given that post-quantum cryptography (PQC) has secret keys with 20 to 60 times longer longercompared to conventional encryption techniques, NeoPUF can effectively meet this demand for generation.generation. As a result, PQC applications depend on NeoPUF to deliver high-quality secret keyssecret keys, enhancing the security of encryption systems.

We're optimistic about it.

The three key components outlined in the Caliptra specification are the same three key featuresfeatures (OTP, PUF,TRNG) that PUFrt was developed to provide over four years ago. Consequently, starting in mid-2024, we have indeed received inquiries from some customers regarding Caliptra. Notably, in the fourth quarter, several projects have already been licensed or are in the process of being finalized.

There are two categories in IP companies:

1. Pure design IP companies

These companies use existing transistors to design specific functional IPs, such as standard cell, SRAM, high speed IO, etc. They license to fabless companies directly and are companies like ARM, Synopsys, and M31 and RISC-V related.

2. Technology + Design IP companies

These companies have their own device technology developed at foundry and they license the technology to foundries, such as OTP, MTP, and Flash. They also use the device they invented to design IP for fabless companies. These companies are, for example, eMemory and SST. SST’s Flash cell is only on the embedded Flash process, while eMemory’s OTP cell covers all the processes. Therefore, OTP’s market size is much bigger than Flash.

The CHIPS Act subsidizes foundries that built fabs in the US. It is only applicable to those who build fabs with the money from the subsidies. Since we did not receive any subsidies, we’re not within the restricted scope.

As mentioned before, our IPs are our original invention, we have patent rights for our IPs in major regions of the world. We also did not receive any subsidies from these governments so we’re not restricted by any national government.

Tape-outs vary significantly in terms of customer size, product application, and mass production scale, so it isn’t easy to use them directly to predict future revenue. However, with the increasing number of process platforms and technologies, there is a clear long-term growth trend for tape-outs and licensing revenue.

We have been licensing our IPs to foundries all over the world. The advantage of using our IP is that our customers can go to different locations for production. There is no such request from customers to decentralize our RD outside of Taiwan. But we did set up Japanese RD team for the reason to recruit talents.

Since our IP technologies are our own invention, we don't need any US or government approval so we can license it directly to anyone.

Although our main R&D is in Taiwan, our IP data is stored in the cloud server. Our patents are registered in all major regions of the world and protected by international regulations. As long as the company's technology is used, regardless of the chip company or foundry, they must pay the license fee and royalty, which is the greatest protection for the company's shareholders. Currently no customers have avoided our IPs due to concerns about war.

All patents are held by the company, and the inventor cannot use the patent if they leave.

We have no accounts receivable problems. Since the company was established, we have only had one small collection problem in the early days, and for most of our Chinese customers, we take prepayment.

We have 9 foundries customers and over 900 chip customers in China, accounting for about 10-15% of our total revenue. There have been no problems with collecting royalties and other payments. This is related to the nature of IPs. ARM offers soft IP, providing customers RTL (similar to software for chip design). They collect licenses and royalties from chip companies. They must audit their customers if customers use the same RTL to other chips without being licensed.

We license the fundamental transistor to the foundries. The foundry pays royalties based on the royalty rate and wafer volume, while the chip companies pay design licensing fees only . Since there are only 9 foundries but more than 900 chip customers in China, it is much easier to collect and audit the accounts of foundries than chip companies.

In addition, we have continuously licensed our technologies to foundries for new process nodes and new applications and continuing tape-outs through end customers' adoption. The contract will be breached if the foundry fails to pay the royalties. As a result, all customers' tape- outs in the pipeline cannot go for production. The loss to the foundry will be much bigger than not paying royalties, not to mention the infringement of lawsuits penalty. The risk of embedded NVM is that there is a problem with memory reading after production, the entire chip or even the system will shut down, and the resulting penalty for damage will be much bigger, so customers don't want to risk illegally obtaining IPs.

The majority of IP companies mainly collect licensing fees but with no or little royalty. Our strategy is to charge less on licensing in the early stage but insist on collecting royalties.

We foresee an increase in foundry penetration rate due to our extensive development in technology platforms across multiple foundries. More than 100 process platforms are under development each year, with an average of 400 new product tape-outs growing to an average of 600 new product tape-outs per year, designing in our OTP, MTP and PUF-related security technologies.

The OTP in mature processes is a very stable cash cow for us due to limited R&D resources. The leading edge and additional royalties from PUF-related security solutions will drive the ASP of future royalties. On the other hand, because of overcapacity, foundries are allocating resources to develop specialty processes to add value and differentiation, such as our MTP-related technology, which witnessed substantial licensing growth this year. The royalty rate for MTP-related technologies is double that of OTP, which will also increase the penetration rate of mature processes and the growth of royalties per wafer.

We've been using our current office for over 15 years, but our employee count has increased by more than 50%, so the existing office space is not enough. We acquired a new office to provide employees with a better working environment and be prepared for expansion in the future.

Our R&D is still based in Taiwan and will not expand along with foundry expansion overseas. This is because we provide technology and design licensing, which does not require on-site execution in local foundries.

The conversion rate from tape-out to mass production exceeds 95%. We have a high conversion rate because most of our tape-outs come from the mature applications of big companies. Almost all of these tape-outs will successfully move to production, resulting in royalty revenue.

Approximately 30 foundries worldwide have licensed our technologies, including Intel and GF.

Our OTP technology is now a standard for applications, like Driver, PMIC, and various sensors, in mature processes. As foundries expand, the need to license our technology is expected to boost our licensing revenue. While the industry faces oversupply and pricing pressures due to foundry expansion, the effect it has on our company will be offset by the increase in royalties per wafer as existing customers move to more advanced processes.

In order to survive, existing foundries are focusing on developing specialty processes with high value-add, such as MTP, embedded flash, and PUF, as is happening now. Our royalties for MTP and PUF-based are much higher than OTP. Furthermore, the increasing contribution from the higher wafer prices of advanced nodes leads us to believe that average royalties per wafer will continue to rise.

Foundry expansions in Europe, the US, and Japan are driving the need for local production by large customers in the future. Deploying our IPs simultaneously in foundries across each region will facilitate convenient adoption for customers, driving increased usage and expanding our business across diverse customers and applications.

Many of our customers developed their first-generation products using foundry’s eFuse. However, in response to competitive pressures and the need for improving cost and performance, they transition to our IPs. Our OTP offers improved yield and reduced chip area compared to eFuse and enables customers to protect their intellectual property (i.e. algorithms) stored in the chip. The success of these has led to the continued adoption of our IPs in subsequent generations of products.

Since 2014, we've been developing IPs for technologies below 16nm. Typically, the foundry provides in-house eFuse for the initial customers for the most leading processes. After the process stabilizes, third-party IPs, like ours, are permitted for technology verification, often occurring after the first batch of customers has entered mass production. This means that 3rd party providers like us need to wait for those migrating from the previous generation to adopt our technology. As Moore's Law slows down, the launch time for the next generation extends, creating a longer interval time like current 2nm and 3nm. This year, once we successfully verified 3nm, we still can catch customers seeking the most advanced process. Overall, this is positive for us.

Moreover, they are always customers migrating to more advanced process node, such as moving from 7nm to 5nm or 16/12nm to 7nm. As long as we have completed process verification, there will still be many opportunities for customer adoption. Even with mature processes, these opportunities remain unaffected by the slowdown or changes in Moore's Law.

Yes, our total addressable market will increase as the world expands foundry capacity and moves toward more advanced technology. Our technology coverage in each foundry will increase as more technology process develop and more fabs are established. With each generation of technology, there is a need for continuity to move to the next generation, therefore our technologies are increasingly available in each foundry. Historically, our royalty income for each foundry have experienced an upward trend. Consequently, as the number of fabs and technology platforms increases, we anticipate a corresponding growth in License fees, NRE, Usage, and Royalties.

The first main reason why we can keep developing new technologies but managed to keep our employee headcount relatively the same is because our IP is reusable. Once we qualify our IPs on the foundry platforms and register it on our IP library, customers can use our IPs anytime unless they require customization. This means that our R&D team can always focus on developing the new technologies and on the more advanced nodes. The other main reason is because of our unique business model, since 70-80% of revenue is contributed by royalty. A royalty-based business drives revenue as more customers adopts our IPs without increasing the employee headcount.

In the future, our hiring plan will mainly revolve around advanced process projects and special projects such as NeoFlash, RRAM, and Security. We will maintain a similar hiring pace.

Our company has many groundbreaking NVM inventions and technologies that surpass those of other companies globally. As long as we continue to develop these inventions and technologies along our roadmap, we can accelerate our growth rate. Currently, acquiring other companies is not under consideration.

Per FSC regulations, our independent directors have served three terms, and therefore, more than half of them need to be replaced. eMemory is a leading company in embedded NVM within the IP industry. We will continue to collaborate with foundries in advanced processes to develop cutting-edge NVM and security technologies, while also expanding our business strategy and partnerships. The newly nominated directors will provide invaluable support to the company, bringing expertise in technology, operational strategy, and forging key partnerships.

For the business growth in 2024, we are very confident due to the following reasons: 1) Our IP portfolios are increasingly diversified, including OTP, MTP, EE, Flash, RRAM, MRAM, PUF, SecureOTP, PUFrt (Root of Trust IP), and PUFcc (Secure Co-processor IP). This will drive significant growth in Licensing, NRE, and Usage revenue in 2024 compared to 2023. 2) Regarding royalties, according to the feedback from our customers, their inventory has decreased to a certain extent, returning to normal levels. Therefore, demand for products in mature nodes will also return to normal levels of production. Furthermore, we have accumulated over 1500 tape outs in the pipeline in the past three years, which will drive our royalty growth further.

For AI application systems, there are three main components: data input, data/model storage, and computing (accelerators). Currently, data input will go through various sensor applications, and eMemory has already entered the field and started receiving royalties. For data storage in NAND/DRAM, there are quite a few customers in NAND SSD controllers and CXL memory interfaces using our IPs, which also results in royalty contribution. In terms of computing, mainly in advanced nodes, customers are using our Root of Trust IPs and SRAM repair IPs, and we believe it will significantly contribute to royalty in the future.

The impact of the excessive expansion of Chinese foundries in mature process nodes will be limited for the following reasons:
1) The leading foundries have not followed pricing cuts as reducing foundry prices does not necessarily guarantee an increase in market share.
2) Customers choose foundry partners not only based on pricing, but also on time delivery, time to market, yield, and services.
3) Furthermore, geopolitical risk pushes major US chipmakers to shift away from manufacturing in China. Also, semiconductor manufacturing localization policies in regions like Europe, the US, and Japan, all limit the effects of China’s overcapacity and downward pressure on foundry prices outside of China.

As our technologies develop towards more advanced nodes and specialty processes, such as NeoFlash and MTP, the royalty we receive will be higher than average. Therefore, we are not concerned about the impact of price-erosion of Chinese foundries. Additionally, based on our previous experience, IPs’ demand and adoption tend to rise as the prices of foundry wafer price decline, ultimately resulting in increased penetration and royalty revenue over time. Also, as foundries continue to expand their capacities, our royalty revenue will grow continuously.

OTP and MTP technology have been in the market for over 20 years, and competition has never stopped. Our company continues to progress into the most leading process nodes, extending our technology portfolio into the security area. Reputation is very important in the IP industry and our customers, whether they are foundries, fabless, or even OEMs, are all satisfied with our technologies and services. All of these are reflected in our revenue and earnings. We strongly believe this trend will continue in the future.

Foundries frequently revise their expansion plans and schedules in response to economic cycles, customer demand, and various other factors. Our collaboration with UMC is not limited to specific processes or location. There are multiple projects ongoing across all our technologies. Therefore, the delay in expanding a particular foundry location will not affect us.

Our DDI customers continue to migrate towards more advanced processes, with the proportion of high-end OLED DDIs steadily increasing. Additionally, the number of OLED DDIs will increase in foldable smartphones, along with content increase on panels (such as e-paper, labels, PMIC-related and more). Overall, we believe that these factors will mitigate the impact of declining wafer prices and remain a strong cash cow for us.

As we mentioned before, the NVM IP business is characterized by high technological barriers, very long periods of development, and relatively small revenue output compared to foundries and chips. Therefore, this is not the focus of localization of semiconductor policies. While we have observed some competition from local IP vendors, customers are very careful about IP adoption, which is not only cost consideration. Factors such as patent protection, quality, reliability, and technical support are much more important considerations. Thus, our licensing cases in China continue to increase. Additionally, some customers have encountered big issues after trying local IP vendors and have subsequently switched to using our IP.

Approximately 85% of our NTOs are from Usage cases, where customers re-use existing IPs and therefore, require minimal engineering resources. Although there hasn't been a significant increase in NTOs per quarter in recent years, our tape outs are continuously moving towards more advanced nodes. The cost of design, development and mask layers increase at more advanced nodes, resulting in fewer NTOs in advanced processes compared to mature processes. The average royalty per tape out in advanced nodes is much higher. In addition, as the proportion of tape outs in advanced node increases year over year, so does our licensing revenue.

In the past three years, we have accumulated over 200 NTOs for MTP, primarily used in applications such as MCU, PMIC, and sensors. These products have gradually entered production, contributing to royalty revenue. In the first quarter alone, we saw over 60% year-over-year growth in MTP royalty. As for ESL, we already have customers in production using our OTP for single-color and three-color driver ICs. Due to customers requiring MTP on new four-color driver ICs, we already have many customers adopting our MTP on multiple foundry process platforms over the past year, which will contribute to our royalties soon.

In 2.5D/3D packaging, chips with different functionalities are packaged together, therefore, if one chip fails, the entire package chip will fail. Our IP can help repair these failed chips. For example, memory components (such as DRAM and SRAM) and image sensors (CIS) are frequently combined with logic ICs. OTP plays an important role as a high-density memory repair and sensor repair in these packaged chips. We already have many customers in this area with continuing adoption from new customers and applications.

The increase in operating expenses in the first quarter is mainly due to the increase in employee and director bonuses as a result of increased net profit before tax. We allocate bonus expenses each quarter as a percentage of net profit before tax (15% for employees, 1.5% for directors), which were included in that quarter’s operating expenses. In the first quarter, there were foreign exchange gains in non-operating income, leading to an increase in net profit before tax and non-recurring increase in bonuses expenses.

The fixed operating expenses in the first quarter, excluding employee/director bonuses, were approximately NT$280 million, which is quite similar to previous quarter. We currently do not have any plans for significant recruitment, therefore, apart from the annual salary increase for employees (averaging 3-5%), changes in future operating expenses will primarily be influenced by changes in net profit before tax.

In recent years, China has actively expanded its production capacity by building new foundries and new fab areas for mature processes, many of which are using our logic NVM technology. In terms of royalties from China, the capacity expansion and increasing penetration rate will drive overall growth, even if foundry wafer prices decline.

As mentioned earlier, we have a unique business model, deep technical expertise, extensive technology platform coverage, and IP applications that span nearly every chip domain. Furthermore, our IPs have a 100% retention rate, meaning that once customers adopt our technologies, they continue to use it across all subsequent product generations. We develop our technologies from the foundational transistor level, with patents protecting all IPs, making it impossible for competitors to replicate. In this field we hold a leading position and are well ahead of our competitors, which means we are not subject to price competition.

We are an IP business, so we do not manufacture end-product chips. Instead, our model is based on collecting licensing fees and royalties from foundries and chip companies, which are not subject to tariffs. In addition, our IP is licensed to foundries globally, including US-based foundries such as Intel and GlobalFoundries, as well as other companies with facilities in the US. Thanks to our global platform coverage and diverse technology processes, we are less susceptible to political impacts.

Regarding licensing fees, MTP-related has shown the highest annual growth, with nearly 86% year-over-year growth. The increase was mainly driven by applications in DDR5 SPD/PMIC, 4-color ESL/ePaper, and System PMIC, primarily in mature process nodes. There are also several projects in advanced process nodes, which have a higher unit price and contribute significantly as well.

In terms of royalties, the 28/22nm nodes contributed the most, including applications like OLED DDI, TCON, ISP, Connectivity, and SSD controllers and more. With a wide range of applications and over 380 NTOs to date, we expect significant growth next year. Other 16/12/7/6nm applications, including security IPs, will also gradually enter production after tape out. Given the low base period, the growth rate and potential will be very significant in the future.

We have licensed our technology and IP to foundries I and G for all their process nodes. Furthermore, other foundries like T and U and others also utilize our technology and IP in their process nodes at their fabs in the United States.

The EDA companies primarily apply AI-assisted design to purely digital IPs, using standard transistors in these designs. In contrast, our IP design uses our own OTP transistors, which are protected by our patents. Unlike digital IPs, OTP and PUF IPs are specialized analog IPs, making them challenging to design using AI. This is because AI relies on large datasets for training, and they do not have sufficient OTP data to enable effective AI-driven design.

Our OTP is already an industry standard and widely applied in mature processes for major applications such as drivers, PMICs, ISP, and various sensors. As foundries expand their capacity, they will need to license our technology, which will increase our royalties. As existing customers transition to more advanced processes, royalties per chip will increase which can offset the downward pressure on foundry prices due to oversupply. To remain competitive, current foundries must focus on developing high-value-added specialty processes, such as MTP, embedded flash, and PUF, which is already underway. Royalties from MTP and security are much higher than those from OTP. Additionally, with advanced, high ASP processes starting to contribute, we expect the average royalty per chip to continue increasing.

Regarding regional political factors, Europe, the US and Japan are also expanding their capacities, which will require major customers to localize production. Since we are deploying our IP across foundriesfoundries in all regions, this will make it easier for chip customers to use our technology, strengthening the stickiness of our IPs and further broadening the scope of our business.

More than 80% of our operating expense is employee salaries, and 30% of the salary expense is linked to employee profit sharing, which account for 15% of the pre-tax income. Since pre-tax income includes non-operating items, and our main non-operating factors are currency gains or losses related to our US dollar positions. The currency losses from the fourth quarter of 2023 led to a decrease in pre-tax profit due to non-operating reasons. This, in turn, reduced the corresponding employee profit sharing expense, and increased the operating profit margin. In Q4 of last year, on the other hand, currency gains were a contributing factor for the increase of expense, resulting in a 4% difference on operating margin year over year. Looking forward, we anticipate an upward trend in the overall operating margin.

Foundry usually begins its development for most leading process with its own foundation IP, typically with its own OTP solution, called eFuse. Most advanced processes in the past have used eFuse for parameter setting, ID, or other functions that require OTP.

For our IPs to be provided to customers, we need to pass all the verifications foundries require, which typically takes 1-2 years. Once our IPs are qualified, it’s usually already too late for the most leading edge customers. For example, our design activities just significantly increased in 6/7nm after our IPs were qualified with customer production records. Most customer applications we engage with now migrated from 12/16nm, and most used eFuse in their previous generations. The reason customers replace eFuse with our IPs is to meet their density or security requirements because eFuse can only write 4K bits at most, while our IPs can accommodate densities a hundred times or higher. Even worse, eFuse can be easily been hacked by reverse engineering.

Due to the increasing demand for security and much higher storage density requirements, customers are constantly requesting our IP solutions in the most leading edge processes.

Moreover, our cooperation with Arm's Confidential Computing Architecture can be adopted by the most leading edge customers. We are working with customers and foundries to accelerate our qualification progress and hope we can catch up in the future.

The licensing of MTP dropped last year was mainly due to a one-time big license payment from China MRAM fab in 2022 and it will take a few years to commercialize before it can contribute to royalty. In terms of royalties, we have already seen significant growth in MTP due to mass production of applications over the previous years.

The latest sanctions mainly target HPC-related products for AI applications. We currently have no Chinese customers in this area, as mostly our leading-edge customers are US and Japan-based. Also, since we develop our intellectual property rather than licensing US technology, we are not directly affected by the sanctions.The latest sanctions mainly target HPC-related products for AI applications. We currently have no Chinese customers in this area, as mostly our leading-edge customers are US and Japan-based. Also, since we develop our intellectual property rather than licensing US technology, we are not directly affected by the sanctions.

DDI and PMIC are analog circuit designs. Because there are variations in the production process of fabs, to control the output signal accurately and meet the specification, they need our OTP/MTP IP to perform output tuning, function setting, post-test parameter storage and code update.

These are already a standard in DDI and PMIC designs. We expect more analog and mixed mode application to follow.

The definition of AI is very broad. I think what most people care about now is the large-scale language training models made by leading GPU/CPU providers N and A, both of which have contacted us in the past. Leading GPU provider N started reaching out in 2020, and we have been discussing how to implement our OTP and PUF into their security architecture. The reason for not being adopted was that our 4/5 nm did not complete the qualification at that time.

For the key storage of Hardware Root of Trust (HRoT), they currently use eFuse. As I mentioned earlier, eFuse is not safe for key storage. OTP or PUF+OTP must be used to provide keys secure storage.

For key generation of Hardware Root of Trust (HRoT), they currently use the conventional True Random Number Generator (TRNG) without PUF, so the entropy and speed of key generation is inferior to what we provide in PUF-based True Random Number Generator (TRNG). In fact, our randomness is about 100 times theirs, they also consume about 100 times the power of ours.

Especially in the future, the length of the key required by post-quantum algorithm will be greatly increased, which will also increase the calculation time. Having high-speed key generation such as ours is very advantageous. We are very confident that with the progress of our 3nm and more production records, we have great opportunities in the future.

In addition to these two major chip suppliers, we also have cloud customers doing in-house AI processor in China and US this year. Furthermore, if AI, in a broad sense, also covers edge computing, then we already have many customers. Our solution is only a small area and can generate basic security functions in a simple way, which is very competitive in edge computing.

Currently, the applications inside the AI server adopting our IPs with  tape-outs or in production are: SSD controllers, CXL memory controllers, Retimers, PMIC and SPD for DDR 5 DIMM card. The CPU and GPU have not yet adopted our IP, but we have a good chance when we complete 3nm verification, especially for those who adopt Arm's solution.

Some customers have adopted our IP in 12nm ISPs with small volume production. Since the price of 12nm wafer is 40% higher than that of 22/28nm, if existing 22/28nm customers switch to 12nm, chip size remains the same, then royalty difference will be the increase of wafer pricing, which has nothing to do with how much density is used.

CXL is the protocol to enhance the memory capacity sharing between CPU and other devices, such as GPU. Our CXL Memory eXpander Controller customers adopt our Root of Trust to protect the security of data confidentiality and integrity during data transfer.

RCD and DB currently do not use. But SPD Hub has adopted NeoEE for 100K endurance. So, inside DDR5 DIMM card, there are two chips SPD hub and PMIC with our MTP solution.

If the customer uses eFuse and it blows out accidentally, they will usually increase the eFuse area, however, this will take up too much space and would be very expensive for advanced process chips. In addition, eFuse cannot accommodate circuit design that needs to burn a large current. However, since eFuse is provided by the foundry, if there is a problem, the foundry will be responsible, so eFuse is still dominating in advanced manufacturing processes. Another type of technology is anti-fuse, mainly our NeoFuse and competitor’s solution. However, the IP of competitors has experienced problems in advanced manufacturing processes. At present,  not heard any customer adopt their solution in leading processes. But it also affects customers' confidence and slows down the adoption of this technology. With more production record and successfully moving into 5nm and 3nm, we are confident to replacing eFuse is only a matter of time.

Multiple customers are working with us, and we are collaborating with the EDA tool company to incorporate our OTP into their SRAM compiler to facilitate customers’ adoption.

Customers use our OTP for multi-chip repair because traditional eFuse is unsuitable for post-packaging modifications. For example, in recent years, ISPs that need to be packaged with DRAM and CIS are driving customers to use our OTP for ISPs. As a result, ISP has contributed to over 10% of our royalties this year.

Furthermore, DRAM manufacturers have also licensed our technology for DRAM repair and after 3D or 2.5D chip packaging with logic chips. We expect more adoptions of our IPs for similar applications in the future.

We do not have any impact since the banned chips don't use our IP yet.

Edge devices all need security protection so that they can securely connect to cloud services. Particularly, with generative AI embedded in edge devices, the AI models and training data must also be protected. Our PUF-based security IPs will have a big market in edge devices.

No, this will not affect us. We are developing our IP in related processes.

Future computing processors will move toward Confidential Computing, which requires high-level security functions. As we have successfully developed PUF-based Root of Trust security IP, which provides very strong security functions for these processors, we have a great opportunity to license these IPs to these Confidential Computing processors. Besides, in order to enhance the computation performance, these processors all need high-density SRAM, our NeoFuse OTP plays an important role for SRAM repair. We expect our IPs to cover a huge market in these processor-related applications.

We have AI-related tape-out, which uses our OTP for SRAM repair due to high SRAM density. With the increasing SRAM density in AI and HPC processors, we foresee increasing demand of our OTP for SRAM repair.

This year, 5nm technology will be adopted in self-driving, data center, and AI-related applications. Meanwhile, 3nm technology is undergoing verification at major foundries. In addition to our collaboration with CPU partners, we already have ADAS and processor customers, as well as a US cloud service provider requesting our IP for 3nm. We are confident about the verification process and anticipate customer design-ins next year.

Our DRAM royalties will increase significantly, driven by the increase in production of existing customers and new customers’ ramping up production.

Taking OLED for example, the main process node in recent years has been 40nm. However, this year marks a significant move towards 28nm production, with future plans for development in 16/17nm. In the case of PMIC for smartphones, which were previously mainly in 8-inch, some will move to 55nm production. Similarly, TV SoC used to be in 12/14nm. One of our customers took the lead to move to 6nm to gain the market share from 12/14nm players. These transitions are all driven by the need for customers to incorporate additional features, achieving faster speeds, and reducing power consumption to enhance product competitiveness.

Our strengths lie in our strong circuit design and device development team. With years of accumulated design experience, numerous patents, and a profound understanding of customer needs, we excel in quickly assisting foundries in customizing specifications for RRAM/MRAM. Our expertise extends to designing IPs tailored to meet customer requirements, and we are able to quickly complete qualification on foundry processes so that customers can use our IPs in their designs and move towards mass production. We have already completed verification at major foundries, and customers have begun to adopt our IPs in their chip designs. Currently, we are moving towards advanced processes.

Currently, our IPs are adopted in ISP, OLED DDI. In the future, more applications will also adopt our IPs, such as PMIC. Memory-related has already adopted our technologies for the DDR5 module-related chips (in SPD hub and PMIC). In addition, we are developing embedded memory-related technologies in their foundries, which will gradually move its way into more products.

Backside power primarily aims to achieve two objectives in processes below 2nm: 1) Improving power efficiency, and 2) Reducing the number of backend layers to lower manufacturing costs. This has no impact on the use of our IPs.

Major cloud service providers are our customers already, using our IP across different product lines. These major players have strict requirements for IP vendors, which we have qualified for many years. Therefore, our IPs can be used in chips of different functionalities, whether in AI servers or edge devices.

eMemory's IPs have been adopted across various applications, which will be integrated into a packaged module as chiplets:
1) In Digital ICs, for storing keys, ROM code, and repairing high-density SRAM.
2) In Analog ICs, for circuit repair and code storage.
3) In DRAM ICs, for DRAM repair functions.
4) In NAND modules, for storing keys for confidential computing.
In the future development of chiplets, we anticipate that more chips in the chiplets will incorporate our IPs instead of just one chip.

There are three aspects to this question:
1) AI applications need a hardware root of trust for protecting assets and ensuring operational security. We offer several security solutions tailored to address these specific security concerns related to AI applications.
2) The computational demands of AI applications require substantial SRAM. Our comprehensive SRAM repair solutions are designed to improve the yield of AI chips and reduce production costs.
3) AI applications rely heavily on a large scale of DRAM. Our complete DRAM repair solution can help meet the demands of AI chips in high-density memory applications.

As early as four years ago, our OTP was adopted in 28nm OLED DDI products by many customers. These products have gradually entered production and continue to contribute to royalties. The penetration rate of OLED DDI in mobile, tablets and notebooks keep on rising and moving towards more advanced processes, driving the royalty growth. Currently, some customers are moving to 22nm OLED DDI, accumulating good production records, and are developing products for the next generation of FinFET HV processes. We are optimistic about our continued growth in this market.

As the demand for AI and HPC increases, the density of embedded SRAM is also growing. Therefore, the demand for using OTP for SRAM repair continues to rise. We have seen an increase in the adoption of our solutions by more customers and products, resulting in more royalty, which we foresee will be a trend and the contribution will increase significantly in the future.

Our first 3nm customers are primarily in Data Center server applications. They require not only OTP, but also PUF-based security to protect data. They will contribute to our revenue in the second half of this year.

Our OTP is mainly used for repair function in DRAM. It has already been implemented on multiple process platforms of several customers and is continuously being developed for more advanced processes. Recently, with the mass production of new processes of DRAM customers, the royalties have increased significantly.

Our MTP technologies include comprehensive product lines that meet different specifications, ranging from high endurance NeoEE and medium-density NeoMTP which require no additional masks, to high-density embedded flash such as NeoFlash/RRAM. The recent growth in MTP is driven by the adoption of NeoEE in PMIC and SPD ICs on DDR5, as well as NeoMTP in new four-color e-paper and electronic shelf label (ESL) driver ICs. Currently, technology licensing to foundries and the adoption across different applications are accelerating. The royalty rate of MTP is higher than OTP, so its contribution to our revenue will become increasingly significant.

Our development of 3nm and 2nm has always aligned with the requirements of the most advanced foundry processes and customers. Currently, some customers have already started design-in for 3nm, while 2nm is in the early stages of development, progressing much faster than previous years. Even if our technology is not adopted by the first generation, there will still be future opportunities due to process migration. For example, even in mature nodes, we still have hundreds of new products using our technologies every year.

As far as we know, we already have customers who have incorporated AI functions into their designs and are moving to tape out in more advanced processes for functions such as recognition and image processing. As mentioned in the last earnings, AI application systems involve data input, data/model storage and computing (accelerators). Currently, our IPs are adopted for applications related to data input through various sensors. For data storage in NAND/DRAM, customers are using our IPs for SSD controller and CXL memory interface. In terms of computing, which is mainly in advanced processes, we have customers adopting our Root of Trust IPs and SRAM repair IPs. These developments are expected to drive our future licensing and royalty growth.

EDA companies offer Built-In Self-Test (BIST) functionality for SRAM blocks. Through our collaboration with EDA companies, we have developed OTP with an appropriate interface that integrates seamlessly into EDA tools, making OTP repair more user-friendly. With Siemens’ BIST holding over 90% of the market share, our partnership with Siemens represents a powerful alliance.

Three companies have already adopted our IP, and all are developing AI SoCs in advanced processes.

These application ICs, driven by the demand for more functions, higher speed, lower power consumption, and reduced costs, will continue to move toward more advanced processes, and even FinFET process. This is a very favorable development for us because it means the IC chips will become larger, wafer consumption will increase, and both our IP and the unit price of foundry wafers will be higher in advanced processes. All these factors will drive continuous growth in our royalties and licensing fees.

Our OTP and MTP technologies have been adopted by several major customers in DDR5 PMIC and SPD ICs. As DDR5 adoption continues to grow, our licensing fees and royalties will increase accordingly.

Using our OTP for SRAM repair has always been the main reason why DDI customers choose our OTP IP. They rely on it because their DDI ICs use large-capacity SRAM, and to maintain high yields and good product performance, OTP is necessary. Now, we're seeing a similar trend in advanced nodes for HPC and AI applications. As these high-end digital ICs require large-capacity SRAM for fast computation, they’ll also start adopting OTP as a standard, just like DDI customers do, to repair SRAM. Across various advanced nodes, we have the demand that customers incorporate our OTP in their designs for SRAM repair.

MRAM and RRAM are both emerging non-volatile memory technologies, each offering unique benefits and use cases. MRAM is characterized by its high speed, low power consumption, and ability to handle numerous rewrites, making it well-suited for applications that demand data reliability and quick access, such as IoT devices, smartphones, automotive electronics, and industrial automation. In contrast, RRAM has a simpler design, is cost-effective, and consumes less power, making it ideal for IoT applications, microcontrollers, and wearable technology. Additionally, as RRAM technology advances, it may find applications in automotive electronics and potentially in AI accelerators and neural network chips in the future.

The decrease in AI costs benefits edge computing applications. In edge AI, data training is used to establish an AI model, which is then used to infer possible results. This entire process, including the protection of input data, the model, and the generated results, requires hardware security IPs. We provide high-performance PUF-based security IPs to make edge AI applications safer and accelerate industry development.