OTP

NeoFuse

Introduction

NeoFuse is a small-form factor logic NVM technology with the advantages of working on low power and being highly reliable and secure. It provides non-volatile storage functions from 0.15um down to the leading 7nm FinFET technology node. The density supports a range of 64 to 4M bits.

For IP operations, NeoFuse provides an user-friendly interface that minimizes design effort and circuit complexity when embedded as a NVM silicon IP. An internal charge pump is designed and embedded in the NeoFuse silicon IP to enable field programming capabilities. eMemory’s proprietary ROM code conversion, NeoROM, can also be used to reduce programming costs once the program code is fixed.

Technical Principles

NeoFuse uses antifuse operational scheme. Impedance change in the memory cell is used to provide data storage functions. With innovative cell design, NeoFuse can reduce the cell program leakage and improve the program disturbance immunity. Moreover, eMemory’s proprietary NeoFuse cell technology greatly minimizes the impact of process variation and ensures greater uniformity of programming operations to achieve one shot successful programming.

NeoFuse comprises a main memory array with a WL/BL decoder/driver, sense amplifier, power switch, and control to execute the program and read functionality.

NeoFuse also supports optional features to meet customers’ needs, such as an embedded charge pump for field side programmability, error code correction (ECC) for high yield with smaller IP footprint/layout, multi-bits program to reduce testing costs, and so on.

Advantages

NeoFuse is fully compatible with generic CMOS processes and does not require additional mask layers or process changes, enabling short development time and time-to-market. When implemented with a built-in charge pump circuit, it offers system-level and in-field programmability. With its antifuse structure, NeoFuse is capable of reliable high-temperature data retention and can be safely exposed to light.

NeoFuse provides additional features including the very simple silicon IP interface for easy IP integration, simple testing flow without re-programming, and very high yield and high reliability.

eMemory extends NeoFuse capabilities on low-power/low-voltage design to fulfill the stringent energy requirements for IoT and wearable device applications. eMemory leverages foundries’ ultra-low power technology platforms (ULP) through collaborative partnership and has developed a power-efficient OTP memory IP for comprehensive use.

Specifications

Five types of NeoFuse are available for a range of applications. Existing silicon IPs with density up to 256K bits are available in 0.15um to 7nm logic process platforms, as listed below.

  • General: code storage, trimming, repair, and encryption in logic process

  • ULP: ultra-low voltage and low-power attributes for IoT applications

  • Security: embedded security and code storage functionality

  • Trimming in CIS: trimming and repair of consumer sensors

  • Repair in DRAM: embedded DRAM repair and trimming

NeoFuse General ULP Security Trimming in CIS Repair in DRAM
Density Up to 256K bits or above Up to 512Kbits 1K to 128Kbits 4K to 128Kbits 128 to 16Kbits
Process Nodes 150nm to 7nm and below 65/55nm to 28nm and below 65/55nm to 16nm and below 110nm to 40nm and below 38nm, 25nm and below
Retention > 10 years > 10 years > 10 years > 10 years > 10 years
Program Power Internal charge pump
External VPP
Internal charge pump Internal charge pump Internal charge pump Internal charge pump
Key Features High speed access Very low VDD operation
Deep standby leakage
Wide range operation
High security In-field programmability CP/FT repair

Applications

The main product application of NeoFuse technology is code storage, such as ID, production record, encryption code, and ROM replacement. It is also good for all kinds of analog trimming, function selection, and parameter setting. NeoFuse macros can be used for a broad range of applications, including set-top boxes (STB), digital TVs (DTV), CMOS imaging sensors, application processors (AP), base-bands, LCD driver ICs, power management ICs (PMIC), and more.

Availability

To date, NeoFuse has been silicon-proven at over 43 qualified process platforms at 8 major worldwide foundries and counting. With its shrinkability and diffusibility, NeoFuse technology has demonstrated that technology nodes can be shrunk from 0.15um to the most advanced 7nm processes. Process derivatives include low-power logic, high-voltage, OLED, BCD, CIS, HKMG, DRAM, eFlash, FDX, or even FinFET.